Testing refinements by refining tests

One of the potential benefits of formal methods is that they offer the possibility of reducing the costs of testing. A specification acts as both the benchmark against which any implementation is tested, and also as the means by which tests are generated. There has therefore been interest in developing test generation techniques from formal specifications, and a number of different methods have been derived for state based languages such as Z, B and VDM. However, in addition to deriving tests from a formal specification, we might wish to refine the specification further before its implementation. The purpose of this paper is to explore the relationship between testing and refinement. As our model for test generation we use a DNF partition analysis for operations written in Z, which produces a number of disjoint test cases for each operation. In this paper we discuss how the partition analysis of an operation alters upon refinement, and we develop techniques that allow us to refine abstract tests in order to generate test cases for a refinement. To do so we use (and extend existing) methods for calculating the weakest data refinement of a specification

Asynchronous Packet-Switching for Networks-on-Chip

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Asynchronous design of a router

A case study in asynchronous circuit design is undertaken. The design we present is particularly robust because the circuit will always function correctly, no matter what the delays in its elements and wires, The problem we consider is that of designing a general-purpose message router for Trans puters. First, a simplified version of a message router is specified. The specification is then taken through two levels of design. It is shown that identical switching elements can be connected together in a regular way so as to implement a router of arbitrary size. The specification and design are presented in a new CSP-like algebraic formalism that is especially suitable for dealing with delay-insensitive circuits. The formalism has three significant advantages over other approaches. The behaviour of circuits can be expressed in a concise, yet easily understood way. Errors arising from transmission interference of signals along wires are handled automatically. The result of connecting circuits together to form more complex circuits can be calculated by a process of algebraic transformation, achieving abstraction from communication on internal wires

Applications of asynchronous circuits

A comparison with synchronous circuits suggests four opportunities for the application of asynchronous circuits: high performance, low power; improved noise and electromagnetic compatibility (EMC) properties, and a natural match with heterogeneous system timing. In this overview paper each opportunity is reviewed in some detail, illustrated by examples, compared with synchronous alternatives, and accompanied by numerous pointers to the literature. Conditions for applying asynchronous circuit technology, such as the existence and availability of computer-aided design (CAD) tools, circuit libraries, and effective test approaches, are discussed briefly. Asynchronous circuits do offer advantages for many applications, and their design methods and tools are now starting to become matur

Applications of asynchronous circuits

A comparison with synchronous circuits suggests four opportunities for the application of asynchronous circuits: high performance, low power; improved noise and electromagnetic compatibility (EMC) properties, and a natural match with heterogeneous system timing. In this overview paper each opportunity is reviewed in some detail, illustrated by examples, compared with synchronous alternatives, and accompanied by numerous pointers to the literature. Conditions for applying asynchronous circuit technology, such as the existence and availability of computer-aided design (CAD) tools, circuit libraries, and effective test approaches, are discussed briefly. Asynchronous circuits do offer advantages for many applications, and their design methods and tools are now starting to become matur

Scanning the issue : Special issue on asynchronous circuits and systems

No abstract